Simulation layout design engineer

Job description:
1. Be responsible for the layout design of analog/mixed signal integrated circuits: the overall layout, the design of sub-circuit modules and the verification of DRC/LVS;
2. Assist the front-end engineer to extract the post-simulation netlist;
3. Complete other tasks assigned by the leader.
Job requirements:
1. Bachelor degree or above, major in circuit, microelectronics, automation, etc;
2. Experience in single chip development;
3. Experience in writing and modifying DRC/LVS/LPE rule files, and experience in power device or radiation resistant layout design is preferred;
4. Familiar with common 0.18um/0.35um/0.5um and above digital-analog hybrid CMOS process;
5. Be familiar with the Linux operating system environment, and skillfully use the EDA tools such as Virtuoso, Calibre, Dracula to carry out circuit layout design and DRC/LVS/LPE verification operations.